Faculty Profile

KSR College of Engineering

Faculty Profile

Name	SATHISH KUMAR T.M
Designation	ASSOCIATE PROFESSOR
Department	ELECTRONICS AND COMMUNICATION ENGINEERING
Official Email	[email protected]

Degree	Specialization	Institute	University	YoP
Ph.D	Low Power VLSI	K S R College of Engineering	Anna University, Chennai	2019
M.E	VLSI Design	K S Rangasamy College of Technology	Anna University, Chennai	2008
B.E	Electrical and Electronics Engineering	Velalar College of Engineering and Technology	Anna University, Chennai	2006
Diploma	Electrical and Electronics Engineering	K S Rengasamy Institute of Technology	DoTE University	2003

S.No	Patent Title	Filing Date	Status
1	Vehicle-to-Vehicle Communication using Light Fidelity (LI-FI) Technology	19-04-2024	Published
2	Solar Charging Station	05-01-2024	Published
3	System for Honey Collecting from Beehive using Remote control	23-10-2020	Published

S.No	Details
1	T. Suganya P. Mangaiyarkarasi G. Thirugnanam T. M. Sathish Kumar, A Hybrid Approach with MPPT Controller for Weed Cutting Based on Solar Powered Lawnmower with Minimal Intervention of Human Involvement Adopting IoT Technology, Analog Integrated Circuits and Signal Processing, March, 2024
2	Dr. T. M. Sathish Kumar, Jaichandru. S, Kamaleshkanna. P , Mathiyazhagan. D, Sathish Kumar. G, Vehicle-to-Vehicle Data Communication Through Light Fidelity(Li-Fi) Technology, International Journal of Creative Research Thoughts (IJCRT), Vol: 12, Issue:4, 2320-282, April, 2024
3	Mr. T.M.Sathish Kumar , Sujitha.P, Huffman Coding Algorithm Based Adaptive Noise Cancellation, International Research Journal of Engineering and Technology, Vol: 10, Issue:06, 2395-0072, June, 2023
4	Sathish Kumar T M, Magibalan R, Mohanprasath A, Ragul T and Selva Praveen S, A real Time Bus Monitoring System using Mobile Location, International Journal of New Innovations in Engineering and Technology, Vol: 22, Issue:1, 2319-6319, April, 2023
5	Alex kumar. J and Dr T M Sathish Kumar, Automatic Traffic control for Ambulance and VIP Vehicle, Journal of Emerging Technologies and Innovative Research (JETIR), Vol: 9, Issue:6, 2349-5162, June, 2022
6	Dr.Poornima , Dr.Sathish Kumar T M, Veeramani , Karuppanasamy K, Rameshkumar J, Jothimani M and Mahendran R, Solar Powered Floating Water Trash Collector, International Journal of Innovative Research in Technology, Vol: 8, Issue:8, 2349-6002, January, 2022
7	AttuluriRakada Vijay Babu , D K Dheer, Y R Tagore, Sathish Kumar T M, SadullaShaik an Gorantla Srinivasa Rao, A Review on the Progress of Intermetallic Solid-State Hydrogen Storage Material for Fuel Cell Vehicles, European Chemical Bulletin, Vol: 11, Issue:1, 2063-5346, January, 2022
8	Sathish Kumar, Oleg R. Kuzichkin, Ahmed Faisal Siddiqi, Inna Pustokhina, Reliability Assessment of Ball Grid Array Joints Under Combined Application of Thermal and Power Cycling: Solder Geometry Effect, Soldering , Vol: 33, Issue:1, May, 2020
9	T.M.Sathish Kumar, R.Saraswathi and S.Ragavi, Design of Energy-Efficient IOT Devices using FINFET Based Secure Adiabatic Logic, International Journal of Intellectual Advancements and Research in Engineering Computations, Vol: 7, Issue:1, 2348-2079, April, 2019
10	Henna Sam.E.J, Pavithra.U.H, Ramakrishnan.P.V, RiyashBasha.S and Mr.T.M.Sathish Kumar , Underground Cable Fault Detection Using IOT, Asian Journal of Applied Science and Technology (AJAST), Vol: 2, Issue:2, 2456-883X, June, 2018
11	Sathish Kumar T.M, Dr.Periyasamy P.S , Energy Efficient All-Digital Phase Locked Loop Architecture Design on High Resolution Fast Clocking Time to Digital Converter (TDC) using Model Prescient Control (MPC) Technique, Wireless Personal Communications, Vol: 101, Issue:4, 0929-6212, January, 2018
12	Sathish Kumar T.M, Dr.Periyasamy P.S and Eswaran.G, Analysis and Reduction of Power in All Digital PLLArchitecture by using Dynamic PFD with CWSP, Asian Journal of Research in Social Sciences and Humanities, Vol: 6, Issue:6, 2249-7315, June, 2016
13	Sathishkumar.T.M and Dr.Periyasamy.P.S, Analysis and Design of Low Power All Digital Phase Locked Loop via Dynamic Logic Phase Frequency Detector in a Standard 0.25-�m CMOS Technology, Asian Journal of Information Technology, Vol: 15, Issue:8, 1682-3915, June, 2016
14	T.M.SathishKumar, P.S.Periyasamy and G.Eswaran, Analysis and Reduced the Complexity of ADPLL Architecture by Using of Digital Phase Frequency Detector, Journal of Scientific Reasearch in Computer Science , Vol: 1, Issue:1, March, 2016
15	G.Eswaran and T.M.Sathish Kumar , Analysis and Minimization of Low Power VLSI Design by Using Dynamic Phase Frequency Detector In ADPLL, International Journal of Scientific , Vol: 7, Issue:2, 2229-5518, February, 2016
16	T.M. Sathish Kumar, Dr.P. S. Periasamy and G.Nandhini, All Digital Phase Locked Loop Architecture Design Using Vernier Delay Time-to-Digital Converter, Australian Journal of Basic and Applied Sciences, Vol: 9, Issue:10, 1991-8178, June, 2015
17	S.Keerthiga, S.Savithakarpagam and T.M.Sathish Kumar , Searching on Encrypted Cloud Documents using Keywords, International Journal of Innovative Research in Computer and Communication Engineering, Vol: 3, Issue:5, 2320-9801, May, 2015
18	T.M. Sathish Kumar, Dr.P. S. Periasamy and C. Divya, A Low Power VLSI Architecture Design Using Enhanced ADPLL, CiiT International Journal of Fuzzy Systems, Vol: 6, Issue:2, 0974 ? 9608, May, 2014
19	R.Mahendran and T.M.Sathish kumar, Low Power Adaptive Viterbi Decoder Design for Trellis Coded Modulation, International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering, Vol: 1, Issue:3, 2321 ? 2004, June, 2013

S.No	Details
1	T M Sathish Kumar , A Real Time Bus Monitoring System using Mobile Location, 7th International Conference on Engineering, Technology and Science, Namakkal, March, 2023
2	T.M.Sathish Kumar , Design of Energy Efficient IOT Devices using FINFET Based Secure Adiabatic Logic, International Conference on Recent Innovations in Engineering Technology and Management(ICRIETM-2019), Erode,
3	G.Eswaran, T.M.Sathish Kumar and Dr.P.S.Periasamy, Analysis and Reduction of Power in All Digital PLL architecture by using Dynamic PFD with CSWP, 2nd International Conference on Advanced Engineering and Technology for Sustainable Development, Coimbatore,
4	G.Eswaran and T.M.SathishKumar, Analysis and Minimization of Low Power VLSI Design by Using Dynamic Phase Frequency Detector In ADPLL, International Conference on Modern Engineering, Science , Trivandrum,
5	T.M. Sathish Kumar, Dr.P.S.Periasamy and , G.Nandhini, All Digital Phase Locked Loop Architecture Design Using Vernier Delay Time to Digital Converter, International Conference on Technological Convergence for Information, Health, Food and Energy Security, Chennai,
6	T.M. Sathish Kumar and G.Nandhini, Analysis of Time to Digital Converter to Design a Low Power All Digital Phase Locked Loop, International Conference on Electrical, Electronics, Signals, Communication and Optimization, Kakinada,
7	S.Arulmurugan and T.M.SathishKumar, VLSI Architecture Design for Analysis of Fast Locking ADPLL via Feed Forward Compensation Algorithm, International conference on Emerging Trends in Computer and Communication Technologies, Kanyakumari,
8	T.M.Sathish Kumar , Protect Children from Child Abduction using real Time GSM Under Measureable Distance, Second National Conference on ?Signal Processing and Communication Systems, Karur,
9	T.M.Sathish Kumar , Alcohol Detection with Automatic Engine Locking System using GSM, Second National Conference on ?Signal Processing and Communication Systems, Karur,
10	T.M.Sathish Kumar , Under Ground Cable Fault Detection using IOT, 10th National Conference on Emerging Trends in Communication and Information Technology(ETCIT-18), Tiruchengode,
11	T.M.Sathish Kumar, Aging Aware Reliable Multiplier Design with Adaptive Hold Logic, National Conference on Advanced Information and System for Sustainable Developments in Electrical and Electronics Engineering, Erode,
12	Low Power Adaptive Viterbi Decoder Design for Trellis Coded Modulation?, National Conference on Recent Trends in Communication,
13	R.Mahendran and T.M.Sathish Kumar , National Conference on Recent Trends in Communication, Computation and VLSI,
14	R.Mahendran and T.M.Sathish Kumar , Low Power Adaptive Viterbi Decoder Design for Trellis Coded Modulation, National Conference on Recent Trends in Communication, Computation and VLSI, Vijayamanagalam,
15	T.M.SathishKumar, E.D.Rajakumar and N,Manikandan, VLSI Architecture using Image Processing, National Conference on Emerging Trends in Electronics and Communication, Kanniyakumari,
16	T.M.Sathish Kumar, Synthesis of Single Bit Control System Processor, National conference on Advanced Communication and Computing, Namakkal,
17	T.M.Sathish Kumar, Interconnect Pipelining in a throughput Intensive FPGA Architecture, National conference on Communication and Signal Processing, Kumarapalayam,
18	T.M.Sathish Kumar and R.Nanda Kumar, FPGA Implementation of Non Zero Clock Skew Circuits, 5th National conference on Application of Emerging Technologies, Hosur,
19	Sowmiya R; M. Pravin Kumar; T. M. Sathish Kumar; Rasika P; M. Poornima Devi; S. Priya Dharshini, Artificial Intelligence-Driven Protein Folding System Employing Alpha Fold, IEEE Conference, ERODE,