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Faculty Profile

NameVADIVEL S
DesignationASSISTANT PROFESSOR
DepartmentCOMPUTER SCIENCE AND ENGINEERING
Official Email[email protected]

Degree Specialization Institute University YoP
B.EElectronics and Communication EngineeringMuthyammal Engineering CollegeAnna University, Chennai2010
M.EApplied ElectronicsBannari Amman Institute of TechnologyAnna University, Chennai2012
Ph.DInformation and Communication EngineeringKSR College of EngineeringAnna University, Chennai2022

S.No Patent Title Filing Date Status
1IOT BASED AUTONOMOUS FIREFIGHTING DRONE20-10-2023Granted

S.No Details
1Vadivel S, Power Efficient Implementation of ECC Using LCSLA Based Dual Field Vedic Multiplier, Proceedings of the Bulgarian Academy of Sciences, Vol: 76, Issue:12, 1310?1331, December, 2023
2Vadivel s, Power Efficient Implementation of ECC Using LCSLA Based Dual Field Vedic Multiplier, Proceedings of the Bulgarian Academy of Sciences, Vol: 76, Issue:12, December, 2023
3Vadivel S, Design of adder based on logical gates for high speed low power robotic applications., Dynamic Systems and Applications, Vol: 30, Issue:10, 056-2176, August, 2021
4Vadivel S, IRIS Image Based Diabetic Prediction Using Fuzzy Clustering Algorithm And SVM Classification Model, South Asian Journal of Engineering and Technology, Vol: 8, Issue:1, 2454-9614, 2019
5Vadivel S , Dynamic Reliable Low Energy Cost Routing Algorithm for Wireless Ad-Hoc Networks, International Journal for Scientific Research , March, 2015
6Vadivel S , Incorporating Mobility to Sensor Networks During Node Failure and Their Analysis For Radio Propagation Models, Journal of Communication Engineering , 2014
7Vadivel S R.Abinaya, R.Abinaya, S.Vidhya, , Latent Palm Print Matching Based on Minutiae Features for Forensic Applications, International Journal of Communication and Computer Technologies,, March, 2014
8Vadivel S , CLRCL Full Adder Based Low Power Multiplier Architectures, International Journal of VLSI and Embedded Systems, January, 2012

S.No Details
1Vadivel S , Design of 64-Bit Low Power Parallel Prefix Adder in Different Word Length: Comparative Study, National Conference on Signals, Systems , Sathyamangalam,
2Vadivel S , A systematic study of various radio propagation models for a hybrid MAC Protocol in sensor networks, Sixth National conference on advanced telecommunication technologies ,
3Vadivel S, Trailing Mobile Slinks to Data Coverage Protocol for Wireless Sensor Networks, National Conference on Cutting Edge Technologies in Information and Communication,
4Vadivel S , Security Verification For Outsourcing Image Data Using Multi Auditing Protocol, National Conference on Recent Trends in Information, Communication and Computing Technologies,
5Vadivel S , 64-Bit Parallel Prefix Adder for High Speed Arithmetic Circuits, First International Conference on Advances in Communication and Computing,
6Vadivel S , Design of 64-Bit Parallel Prefix VLSI Adder for High Speed Arithmetic Circuits, IEEE International Conference on Computing, Communication and Applications,